Updated below with additional implementation details.
NOR Flash technology growth has been fueled by the NOR support for Execute in Place (XIP). Unlike the NAND Flash interface, where entire memory pages need to be shifted into memory to be operated upon, NOR flash is directly addressable. And this direct addressability allows instructions to be read and executed directly from the memory. There is no need to shift pages out one at a time. Byte addressability and support for XIP makes NOR ideal for boot loaders, ROMs, and the control program store for consumer devices. For example, the iPod Nano uses Silicon Storage Technology 39WF800A 8-Megabyte NOR boot flash (eeTimes).
Since NAND flash is not byte addressable providing only a block mode interface, it is typically attached to PCs and servers as an I/O device. The NOR support for direct byte addressability makes it a candidate for attachment as a memory rather than as a block mode I/O device and when I first read the press release I thought this was what Spansion has done in partnership with Virident Systems. It’s clear they have NOR Flash memory in a memory (DIMM) package and they refer to it throughout the press release as “memory extension”. However, upon closer inspection, it appears to require that the NOR memory DIMM packages all be installed in a separate gateway server they refer as a “Green Gateway”. It looks like the design has all the NOR flash in this separate server and a device driver on the host to virtualize memory on the NOR flash server. Essentially it still may be accessed via an I/O interface which is to say it’s not clear why you couldn’t do the same thing with NAND Flash. And, it’s not immediately clear what protocol is used, what operating systems are supported, nor the exact performance but, overall, it still looks interesting.
Update: In conversations with Virident, it appears this part is potentially more interesting that I initially speculated. Rather than hosting the memory in an independent server as I speculated, it’s an in-server design but does require some BIOS engineering. From Virident: The current interconnect is the HTx bus for AMD servers. Will be QPI for Intel. We are doing AMD first. You should be able to install on a standard two socket board. DRAM sits behind the processor, and EcoRAM sits behind the controller. Of course, the BIOS for the system must support the extended memory – we have HP systems up and running as a proof of concept, and Dell should work fairly soon.
HTX and QPI open up big opportunities for hardware startups to innovate. I know of many startups heading down this path. More innovation coming.
EcoRAM looks like it’s worth investigating in more detail.
A (slightly) more detailed presentation is available at: http://www.spansion.com/about/news/events/Transforming_the_Internet_Data_Center.pdf. Some interesting speeds and feeds from the press release and the presentation:
· 1/8th the power of DRAM at a given capacity,
· Estimating that 8x power to storage capacity advantage over DRAM will grow to a full 16x by 2012
· 10x the reliability of DRAM,
· smaller die area per bit,
· much closer to DRAM access times (a bit vague on this one).
The Achilles heel of NOR Flash has been the poor write speed. The press release claims 2x to 10x better than traditional NOR Memories but this is still considerably slower than DRAM.
We need a lot more technical data and repeatable performance measures but, with what has been published so far, it would appear that the sweet spot for this device are very high random IO rate, read-mostly workloads. Potentially fairly interesting.
Thanks to Son VoBa of the Windows Virtualization team for sending this my way.
James Hamilton, Data Center Futures
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